Enrico Fraccaroli (Galfurian)
105 lines
3.2 KiB
C
105 lines
3.2 KiB
C
/// @file pic8259.h
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/// @brief Data structures and functions required to manage the PIC8259.
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/// @details
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/// The Intel 8259 is a Programmable Interrupt Controller (PIC) designed
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/// for the Intel 8085 and Intel 8086 microprocessors.
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/// @copyright (c) 2014-2022 This file is distributed under the MIT License.
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/// See LICENSE.md for details.
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#pragma once
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#include "stdint.h"
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/// The total number of IRQs.
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#define IRQ_NUM 16
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/// @defgroup irqs Interrupt Requests (IRQs).
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/// @brief This is the list of interrupt requests.
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/// @{
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/// @brief System timer.
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#define IRQ_TIMER 0
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/// @brief Keyboard controller.
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#define IRQ_KEYBOARD 1
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/// @brief cascaded signals from IRQs 8–15 (any devices configured to use IRQ
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/// 2 will actually be using IRQ 9)
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#define IRQ_TO_SLAVE_PIC 2
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/// @brief Serial port controller for serial port 2 (and 4).
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#define IRQ_COM2_4 3
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/// @brief Serial port controller for serial port 1 (and 3).
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#define IRQ_COM1_3 4
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/// @brief Parallel port 2 and 3 (or sound card).
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#define IRQ_LPT2 5
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/// @brief Floppy disk controller.
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#define IRQ_FLOPPY 6
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/// @brief Parallel port 1.
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#define IRQ_LPT1 7
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/// @brief Real-time clock (RTC).
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#define IRQ_REAL_TIME_CLOCK 8
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/// @brief Advanced Configuration and Power Interface (ACPI)
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/// system control interrupt on Intel chipsets.[1] Other chipset
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/// manufacturers might use another interrupt for this purpose, or
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/// make it available for the use of peripherals (any devices configured
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/// to use IRQ 2 will actually be using IRQ 9)
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#define IRQ_AVAILABLE_1 9
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/// @brief The Interrupt is left open for the use of
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/// peripherals (open interrupt/available, SCSI or NIC).
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#define IRQ_AVAILABLE_2 10
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/// @brief The Interrupt is left open for the use of
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/// peripherals (open interrupt/available, SCSI or NIC).
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#define IRQ_AVAILABLE_3 11
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/// @brief Mouse on PS/2 connector.
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#define IRQ_MOUSE 12
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/// @brief CPU co-processor or integrated floating point unit
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/// or inter-processor interrupt (use depends on OS).
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#define IRQ_MATH_CPU 13
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/// @brief Primary ATA channel (ATA interface usually serves
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/// hard disk drives and CD drives).
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#define IRQ_FIRST_HD 14
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/// @brief Secondary ATA channel.
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#define IRQ_SECOND_HD 15
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/// @}
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/// @brief Function that initializes the processor pic 8259 that will manage the
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/// interruptions.
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void pic8259_init_irq();
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/// @brief This function, enable irqs on the pic.
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/// @details This function provide a tool for enabling irq from the pic
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/// processor.
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/// @param irq Number of irq to enable.
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/// @return 0 If all OK, -1 on errors.
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int pic8259_irq_enable(uint32_t irq);
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/// @brief This function, disable irqs on the pic.
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/// @details This function provide a tool for enabling irq from the pic
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/// processor.
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/// @param irq Number of irq to enable.
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/// @return 0 If all OK, -1 on errors.
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int pic8259_irq_disable(uint32_t irq);
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/// @brief This is issued to the PIC chips at the end of an IRQ-based
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/// interrupt routine.
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/// @param irq The interrupt number.
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void pic8259_send_eoi(uint32_t irq);
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/// @brief This Function return the number of current IRQ Request.
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/// @return Number of IRQ + 1 currently serving. If 0 there are no IRQ.
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//int pic8259_irq_get_current();
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